Advance the Future of Space & Defense Electronics as an ASIC/FPGA Verification Engineer
Location: Mountain View, CA 94043 (Onsite) Additional Onsite Locations: El Segundo, CA | Mesa, AZ Job Type: Full-Time Consultant (12-Month Assignment) Schedule: Monday–Friday, 8:00 AM – 5:00 PM Pay Rate:Starting at $68.48 per hour
Shape the Next Generation of Aerospace Electronics
PDS Tech Commercial is partnering with a leading organization in the aviation, space, and defense industry to hire an Electrical Design and Analysis Engineer (ASIC/FPGA Verification Engineer). This role supports Electronic Products, where you will help design and verify mission-critical ASICs and FPGAs used in space systems, avionics, and advanced defense applications.
Your work will directly impact the reliability, performance, and safety of high-complexity electronic systems operating in some of the most demanding environments imaginable.
What You’ll Do
In this role, you will be responsible for advanced verification and validation of digital hardware systems, including:
Developing SystemVerilog/UVM testbenches for ASIC and FPGA verification
Building reusable, self-checking UVM components such as drivers, monitors, sequencers, and scoreboards
Creating and executing functional coverage models to ensure full verification closure
Designing test cases for DSP functions and third-party IP integration
Supporting FPGA bring-up, hardware emulation, and prototyping activities
Automating verification workflows using scripting tools such as Python, Perl, and Make
Collaborating with system engineers and hardware teams to define requirements and debug issues
Using version control systems (Git/SVN) to manage and track development efforts
Required Qualifications
Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field (or equivalent experience)
Hands-on experience in ASIC/FPGA verification using SystemVerilog and UVM
Strong ability to develop self-checking, object-oriented testbenches
Experience with functional coverage and code coverage closure techniques
Proficiency working in Linux-based environments
Experience with scripting for automation (Python, Perl, or similar tools)
Strong analytical and debugging skills
This position requires use of information or access to facilities subject to the International Traffic in Arms Regulations (ITAR) and/or Export Administration Regulations (EAR). These regulations may limit access of controlled technologies: 1) to U.S. Persons, including U.S. Citizens, lawful permanent residents, and other narrow categories including refugees and asylees, or 2) to certain foreign nationals that have received an export license.
Preferred Qualifications
2+ years (Associate level) or 5+ years (Experienced level) in ASIC/FPGA verification
Experience with hardware emulation platforms (e.g., Palladium) and FPGA prototyping
Familiarity with high-speed interfaces such as PCIe, Ethernet, or JESD204C
Experience with SystemVerilog Assertions (SVA)
Knowledge of RTL-to-GDS workflows
Exposure to space or radiation mitigation design techniques
Why Join Us
At PDS Tech Commercial, you’ll be part of work that truly matters. Through our partnership with a global leader in aerospace innovation, you’ll contribute to cutting-edge technologies that power space exploration, defense systems, and next-generation avionics.
You’ll benefit from:
High-impact work on industry-leading aerospace programs
Competitive hourly compensation
Exposure to advanced verification methodologies and tools
Collaborative engineering environments with top-tier technical talent
Opportunities to work across multiple U.S. aerospace hubs
This is your chance to apply your expertise to projects where precision, reliability, and innovation are critical to success.
Take the Next Step
If you’re ready to bring your ASIC/FPGA verification expertise to groundbreaking aerospace programs, we want to hear from you.
Apply today and help engineer the future of space and defense technology.
Pay Details: $68.48 per hour
Benefit offerings available for our associates include medical, dental, vision, life insurance, short-term disability, additional voluntary benefits, EAP program, commuter benefits and a 401K plan. Our benefit offerings provide employees the flexibility to choose the type of coverage that meets their individual needs. In addition, our associates may be eligible for paid leave including Paid Sick Leave or any other paid leave required by Federal, State, or local law, as well as Holiday pay where applicable.
Equal Opportunity Employer/Veterans/Disabled
Military connected talent encouraged to apply
To read our Candidate Privacy Information Statement, which explains how we will use your information, please navigate to https://www.pdstech.com/candidate-privacy
The Company will consider qualified applicants with arrest and conviction records in accordance with federal, state, and local laws and/or security clearance requirements, including, as applicable:
The California Fair Chance Act
Los Angeles City Fair Chance Ordinance
Los Angeles County Fair Chance Ordinance for Employers
San Francisco Fair Chance Ordinance
Massachusetts Candidates Only: It is unlawful in Massachusetts to require or administer a lie detector test as a condition of employment or continued employment. An employer who violates this law shall be subject to criminal penalties and civil liability.
Job Number:
US_EN_33_022581_2530198
Job Location:
Mountain View, CA
Rate:
68.48
Per Diem:
--
Overtime:
--
Duration:
indef
Start Date:
ASAP
Input Date:
04/07/2026
Last Updated:
04/08/2026
Firm Name:
PDS TECH COMMERCIAL, INC
Attention: Address:
545 E JOHN CARPENTER FWY STE 950
City, State:
IRVING, TX 75062
Phone:
214/647-9600
800 Phone:
800/270-4737
Email:Client.Services@pdstech.com Website:Go To PDS Tech Commercial Website
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