Job Listing Description

FPGA Design Engineer - DSP

PDS Tech is seeking a FPGA Design Engineer

In your role, you will:

  • Field Programmable Gate Array (FPGA) design engineer with industry experience in digital communications, modems, and/or digital signal processing (DSP). Areas of desired experience or education include:

    • Modulation
    • Demodulation
    • Digital filters
    • Forward Error Correction (FEC)
    • FPGA verification through simulation and unit testing.

• Bachelor’s (Master’s preferred) degree in Computer Science, Computer Engineering, Software Engineering or Electrical Engineering.
• GPA of 3.0 or greater (3.5 preferred)
• 6+ years FPGA design experience on Digital Signal Processing designs.

Preferred Skills:
• Experience in either VHDL (preferred) or Verilog development languages.
• Experience implementing complex modem and/or DSP circuits in programmable logic using FPGA devices. Equivalent experience in ASIC design is also applicable.
• Experience implementing industry standard interfaces (e.g. 10/100/1000 Ethernet, SPI, UART, SDRAM, DDR3, JESD, PCIe, Ethernet).
• Experience in simulation, synthesis, and placement software tools such as ModelSim, Synplicity, Xilinx Vivado / ISE and/or Altera Quartus development tool sets.
• Experience in laboratory debug techniques using digital scopes, logic analyzers, BERTS, and other complex measurement devices.
• FPGA Design using High-speed serial interfaces (3+ Gbps)
• Familiarity with code revision management tools such as Git/Clearcase.
• Familiarity with C/C++/C# and Matlab/Simulink.
Job Number: 2110134699
Job Location: Salt Lake City, UT
Per Diem: No
Duration: 6 months
Input Date: 07/08/2021
Last Updated: 07/23/2021
Attention: Peter Pham
Address: 1215 FERN RIDGE PKWY STE 231
City, State: ST LOUIS, MO 63141
Phone: 314/628-9143
800 Phone: 800/472-3737
Fax Phone: 314/628-9485

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