Job Listing Description

FPGA Design Engineer - Secret Clearance

Job Description:

• Perform FPGA Design: Architecture, Algorithms, VHDL code generation, VHDL simulation, Synthesis and Device Implementation & Constraints, System Integration and Test.

• Design Low/Med Complexity Circuit Card Assemblies (CCA) and Low/Med Complexity Field Programmable Gate Array (FPGA) starting from System De-composition and completing through System Integration and Test

• Perform CCA Design specifying Mixed Signal Technology circuits consisting of A/D, D/A, Processors, I/O communication and Programmable Logic (FPGA, CPLD) circuits.

Required Experience:

• BSEE, Computer Engineering. or other related technical field of study

• 4+ years of relevant experience as it pertains to digital design process within FPGA

• Knowledge of High Complexity Digital Design Techniques and Devices

• Hardware debugging skills & experienced in operation of Signal Generator, Logic Analyzer, Digital Oscilloscope and Embedded FPGA Debugging tools.

Desired Skills:


• General: Microsoft Office, DOORs (Requirement Specification and Tractability), Revision Control • Circuit Card: Cadence Allegro for Schematic Entry and to support PWB Layout/Route

• FPGA: Mentor Graphics HDL Designer, Mentor Graphics ModelSim/Questa, Synopsis Synplicity, Xilinx Client, Xilinx Vivado, Altera Quartus.

Nesco Resource is an equal employment opportunity employer and does not discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, age, or veteran status, or any other legally protected characteristics with respect to employment opportunities.

Job Number: 18-49882
Job Location: Clifton, NJ
Rate: 0.0USD/Hour
Per Diem: --
Overtime: --
Duration: 2019-06-21 00:00:00.0
Start Date: 2018-12-17 00:00:00.0
Input Date: 11/28/2018
Last Updated: 03/18/2019
Attention: Paul Chacon
Address: 101 COMMERCE ST STE 3001
City, State: LAKE MARY, FL 32746
Phone: 407/710-8000
Fax Phone: 407/710-8001

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