Job Listing Description

Consulting Engineer ASIC/FPGA (VHDL) Designer

Description:
PDS Tech, Inc. is seeking a Consulting Engineer ASIC/FPGA (VHDL) Designer, in Redondo Beach, CA.

Summary:

  • VHDL design of ASIC and/or FPGA logic, with an emphasis in Digital Signal Processing
  • FPGA/ASIC verification via simulation and emulation (lab testing), synthesis, timing analysis, and place and route for FPGA
  • FPGA design for Space environment or Space Application

 

 
Qualifications:
Basic Qualifications: 

  • Bachelor’s Degree in Electrical or Computer Engineering from an accredited institution with minimum of 22+ years of experience with Logic Design in VHDL or Verilog; or 20+years of experience with Master’s Degree
  • 25 years of Digital Signal Processing design experience.
  • Well versed in VHDL design for aerospace environment or space application
  • US Citizenship required

Preferred Qualifications:

  • Hands-on lab experience with testing of digital hardware is highly desired.
  • 12 years of Digital Signal Processing design experience.
  • Must have the ability to obtain and retain an active Security Clearance


 
 
Job Number: 2010118905
Job Location: Redondo Beach, CA
Duration: 12 months
Input Date: 11/14/2020
Firm Name: PDS TECHNICAL SERVICES
Attention: Peter Pham
Address: 1215 FERN RIDGE PKWY STE 231
City, State: ST LOUIS, MO 63141
Phone: 314/628-9143
800 Phone: 800/472-3737
Fax Phone: 314/628-9485
Email: cecjstlouis@pdstech.com
Website: https://pdsjobs.force.com/candidates/job_detail?id=a1i1T000003P6mpQAC&URLSource=cjhunter

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