Job Listing Description

ASIC Design Engineer

Description:
Description:

JOB DUTIES:

- Perform IP source code development integrating external IP from ARM and Cadence processors while adding custom logic for an exciting new project.
- Perform RTL design using Verilog

EXPERIENCE:

- 6+ years of RTL design experience using Verilog is required
- Experience integrating external IP from ARM into an ASIC is required
- Experience coding RTL for custom IP development is required
- Understands the system level, including general concepts of operating system software and hardware interactions

- Experience working with Cadence Digital Signal Processing (DSP) logic is a plus.
- Experience working on IP blocks with 1 million+ gates is a plus.
- Experience integrating ARM Coresight is a plus
 
Job Number: X20190025
Job Location: Boxborough, MA
Duration: 12 Months
Input Date: 06/12/2019
Firm Name: XPEERANT
Attention: Woody Arnold
Address: 4518 SEABOARD LN
City, State: FORT COLLINS, CO 80525
Phone: 970/282-9287
Email: woody@xpeerant.com
Website: www.xpeerant.com

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