Job Listing Description

RFIC Layout Senior Engineer – San Diego, CA / Cupertino, CA

Description:
RFIC Layout Senior Engineer – San Diego, CA / Cupertino, CA – JR-017485


At Cyient's Semiconductor, IoT, and Analytics (SI&A) business unit, we are proud to work on technology that is transforming how ordinary things work to perform better and provide greater convenience.

Cyient brings more than 20 years of experience in semiconductor and software systems solutions and services. Our strong technical and domain expertise with a robust ecosystem partnership makes us your trusted global semiconductor partner, from concept to production.

With the integration of two key acquired technologies, semiconductor, and digital transformation, into our services, we offer the Industrial Internet of Things (IIoT) industry end-to-end digital solutions. We support embedded intelligence at the edge, connected intelligence in the cloud, and actionable intelligence for the customer.

Job Description

In this role, you will work closely with the RFIC design team to layout and verify custom RF and analog IP for complex SoC products.


Key Qualifications:
Experience in custom RF/analog layout with extensive knowledge of deep sub-micron CMOS (40nm, 28nm, FinFet, etc.)
Knowledgeable in layout techniques for device matching, minimizing parasitics, RF shielding, and high frequency routing
Must have experience in 7nm or less
Solid understanding of RC delay, electro migration, and coupling
Understanding of guard rings, DNW, PN junctions, and advanced process effects such as LOD, WPE, etc.
High level proficiency in interpretation of CALIBRE DRC, ERC, LVS, etc.
Knowledge of CADENCE layout tools
As an RF Engineer, you will be responsible for:
Detailed transistor-level layout of RF and analog circuit blocks including LNA, mixers, PLL, LO generation, modulators, power amplifiers, ADC/DAC, baseband filters, and bandgap/bias/LDO.
Block level and top-level layout through full verification flow including extraction, DRC, LVS, and DFM checking
Co-work with designers on block level and top-level floorplanning
Layout review for power/gnd routing, electromigration, signal path check, differential and IQ matching, and signal coupling

Cyient recruits, employs, trains, compensates, and promotes regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender, gender identity or expression, veteran status, and other protected status as required by applicable law. We are proud to be a diverse and inclusive company where our people can focus their whole self on solving problems that matter.
 
Job Number: JR-017485
Job Location: San Diego, CA
Input Date: 06/29/2020
Firm Name: CYIENT
Attention: Elizabeth Stoddard
Address: 1401 NOLAN RYAN EXPY
City, State: ARLINGTON, TX 76011
Email: elizabeth.stoddard@cyient.com
Website: www.cyient.com

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