Job Listing Description

THIS JOB IS NO LONGER AVAILABLE. THIS IS ARCHIVAL INFORMATION.
ASIC/FPGA Design Verification Engineer

Description:
Description:
Create UVM simulation plan from design specification. Create or modify UVC, Score Board, Monitor, and test cases.
Verify until functional coverage and code coverage meet project threshold. Document results.

Required Skills:
• 5+ years of experience
• 1-2 years of UVM tool
• Cadence Xcelium verification tool
 
Job Number: 23-26745
Job Location: EL Segundo, CA
Per Diem: Possible
Overtime: Possible
Duration: 6 months
Start Date: ASAP
Input Date: 11/02/2023
Last Updated: 11/08/2023
Firm Name: ICONMA LLC
Attention: San
Address: 197 STATE ROUTE 18 STE 205
City, State: EAST BRUNSWICK, NJ 08816
Phone: 248/275-1161
Website: www.iconma.com

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