Job Listing Description

Senior Firmware Engineer

 Job Description

This is an Engineering position for High Speed Interconnect Products (HSIP).

Our client has the most extensive physical layer product portfolio in the industry including 400-Gigabit Ethernet Copper and Optical PHYs, Backplane SerDes, 10GBASE-KR PHYs and Optical Transport. client's proven PHY technology offers lower power with a smaller footprint, as well as proven interoperability and advanced features, making it easier and less expensive to build an array of networking equipment, including telecommunications chassis, switches, routers, hubs and more.
In this role you will join a team of highly skilled designers involved in design, modeling, verification, firmware and software development for the physical layer of high speed SerDes at speeds of 112G+ with both analog and digital components.
The types of software implemented include: control and status, debug functions, and interface/integration with analog functions in both firmware and API levels.

Experience:  Typically requires a minimum of 4-8 years of related experience.  At this level, post-graduate coursework may be desirable.
Responsibilities may include:

Develop and support API software for SerDes IP cores across company
Application and support software development
Optimize implementation at various levels including firmware, API and Application.
Integrate and debug the modules on development systems and target hardware.
Document design and implementation details.
Provide customer support and field debugging as required.
Develop, test and debug firmware associated with physical layer functionality
Lab testing and debug of SerDes
Support marketing group with customer meetings and collateral
Typically requires a BS degree and 4-8 years of experience or an MS degree and 3-8 years of experience developing, implementing, and testing high performance communications/networking systems.
Strong software development and debugging skills are mandatory.
Significant hands on experience with high speed serial devices (SERDES) is required.
Good understanding of Physical layer for one of following: IEEE802.3, PCIE, CEI or FC
Proficiency in the following:
4-8+ years C/C++ programming
Perl, python or other scripting languages
Source code control and bug tracking systems
Bit error rate tester 
Job Number: x20190081
Job Location: Austin, TX
Rate: PERM
Duration: Perm
Input Date: 07/23/2019
Last Updated: 08/24/2019
Attention: Woody Arnold
Address: 4518 SEABOARD LN
City, State: FORT COLLINS, CO 80525
Phone: 970/282-9287

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