Job Listing Description

Engineer Circuit Design 5 (UVM) / Engineer experienced in Modeling and Verification CA

Description:
Engineer Circuit Design 5 (UVM) (Job Number: 18020949)

Number of Openings: 1

Location(s): United States-California-Redondo Beach


Shift: 1st Shift

Target Start Date: Dec 17, 2018

Target End Date: Dec 13, 2019

Pay Rate: $85/hr

Work Schedule: 9/80

Duration of Assignment: Up to 1 year

Aerospace Systems is seeking an Engineer Circuit Design 5 based in Redondo Beach, CA. This person will join the Digital Products Department. The ideal candidate is an Engineer experienced in Modeling and Verification. This person will work on multi-million gate ASIC and FPGA developments in the areas of digital communications, signal processing, network routing, embedded processors and switching applications for air and space applications.

The responsibilities of this position include developing verification plans, architecting and implementing verification environments, writing and executing tests, and documenting verification results to support requirements selloff. Candidate must have digital verification expertise using advanced verification methodologies and techniques including constrained-random verification using System Verilog and OVM/UVM, assertions and functional coverage using PSL or SVA, and modeling using C/C++, System Verilog, or System C.


Basic Qualifications:

Bachelor's degree in a STEM discipline with a minimum 15 years of relevant

Verification using System Verilog and OVM/UVM.


Preferred Qualifications:

Mentor Questa simulator, VHDL or Verilog, PSL or SVA, C/C++, System C
 
Job Number: MB-1697
Job Location: Redondo Beach, CA
Rate: 85/hr
Per Diem: no
Duration: 12 months
Input Date: 11/05/2018
Last Updated: 11/15/2018
Firm Name: MIDCOM CORPORATION
Attention: Jeana Edrozo
Address: 1275 N MANASSERO ST
City, State: ANAHEIM, CA 92807
Phone: 714/630-1999
800 Phone: 800/737-1632
Fax Phone: 714/459-7055
Email: jeana@midcom.com
Website: www.midcom.com

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