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THIS JOB IS NO LONGER AVAILABLE. THIS IS ARCHIVAL INFORMATION.
Contract to Hire - Electrical Engineer

Description:
RESPONSIBILITIES:
Reporting to the Manager, Engineering (ASIC/FPGA), the Senior Member of Engineering Staff (SMES) Design Engineer will be part of the core design team, responsible for the architecture, implementation, verification/validation through Software integration test, for delivery of complex FPGAs AND/OR ASICs systems.

S/he will develop architectures for implementation of high throughput complex designs involving Cryptographic Algorithms (VHDL, HLS) with high speed protocols NVMe, PCIe/SRIOV, 10G-400G Ethernet, TCP/IP, and IP development/integration targeting ARM SOC FPGAs (Ex. Xilinx MPSOC) AND/OR ASICs.

Additionally S/He will be responsible for writing/debugging tests/sequences for End-to-End simulation on UVM framework, with System Verilog Assertions, and also writing/debugging C++ based SW driven validation on SOC evaluation boards (Xilinx MPSOC) running Linux.

We have deployed state-of-the-art EDA flows/methodologies including Synopsys DC/Primetime/Synplify, Xilinx/Intel/Microchip EDA including HLS, Mentor Questa family, VIPs for UVM, Clock Domain Crossing (CDC), Catapult (HLS).

This is a key, high impact, high visibility role in the organization to ensure robust quality and delivery of Communication products for National Security.

REQUIRED EXPERIENCE:
At least 5 year experience with proven track record of implementing complex algorithms in networking ASIC/FPGAs Proficiency in VHDL, C++ (OOP) and System Verilog Assertions (SVA) Experience with debugging in ARM ecosystem with Linux OS Knowledge of high-speed protocols (PCIe, TCP/IP, Ethernet) Excellent Analytical/Debug skills Good verbal, written, and presentation skills

PREFERRED EXPERIENCE:
High Level Synthesis (HLS) with Vivado, Mentor Catapult Xilinx MPSOC, and Vivado SDK and Linux super user Cryptographic and high speed networking designs

EDUCATION:
Accredited Bachelor of Science in Electrical Engineering or Computer Science or equivalent. Master of Science in Electrical Engineering or Computer Science preferred

WORK HOURS:
9/80
Full-Time

MISCELLANEOUS: Applicants responding to this position will be subject to a government security investigation and must meet eligibility requirements by currently possessing the ability to view classified government information.

Job Number: 187216
Job Location: Camden, NJ
Rate: Up to $78.59/hr
Duration: LT
Start Date: ASAP
Input Date: 01/19/2021

Firm Name: CHIPTON ROSS
Attention: Terry Jones
Address: 420 CULVER BLVD
City, State: PLAYA DEL REY, CA 90293
Phone: 310/414-7800 X286
800 Phone: 800/927-9318
Fax Phone: 310/414-7808
Website: www.chiptonross.com


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